Senior Signal and Power Integrity Engineer


Santa Clara, CA

We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle!

What you'll be doing:

  • Work on crafting creative Signal and Power Integrity solutions to complex system design problems.

  • System-level power integrity simulations of high-performance AI systems, graphic cards, and Tegra systems.

  • Work closely with VLSI power teams and package/board design teams to design, optimize, and model power delivery networks (PDN) including dies, packages, boards, and voltage regulators.

  • Package and board PDN guidelines creation, review, and post layout PI extractions.

  • Opportunity to work in a dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit.

What we need to see:

  • MS/PhD-Electrical Engineering or equivalent experience

  • 5+ years of industry experience.

  • Strong technical background in applied electromagnetics, transmission line theory and signal processing will be highly valued.

  • Power integrity experience with core powers or IO powers.

  • Good understanding of how die/package/board decoupling impacts power supply noises in different frequency ranges

  • Hands on use of PowerSI, PowerSI, 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE, or similar and 2D such as Ansys2D.

  • Familiarity with power noise budgeting based on core logic static timing requirements or IO power PSIJ requirements.

Ways to stand out from the crowd:

  • Good understanding of how regulators work and expertise in regulator modeling.

  • Knowledge of package/board/decoupling capacitor technology & design.

  • Scripting for analysis automation

The base salary range is 128,000 USD - 304,750 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ID:uDnQdo