Design For Test Engineer Intern
Cavium Networks, Inc.
At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.
The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.
The OpportunityCentral Engineering ASIC Design Services in Marvell designs and develops complex, custom chips for external customers in market segments ranging from artificial intelligence and machine learning to wired and wireless infrastructure. The Design-for-Test (DFT) team is a global team that impacts chip design from inception all the way to manufacturing production. Rigorous DFT methods ensure that a chip can be tested with an extremely high degree of defect coverage in a time-constrained manufacturing environment, directly impacting product quality and customer satisfaction.
The ideal candidate will possess both digital logic design and verification skills along with software development and programming skills. Such a candidate will enjoy an opportunity that spans disciplines and involves them in all aspects of semiconductor chip design.
Develop understanding of the block level or chip top design-for-test (DFT) and automated test pattern generation (ATPG) flows for complex custom ASIC designs
Execute DFT insertion and verification flows for scan test, Memory Built-in Self-Test (MBIST), and IP macro test
Execute digital logic, MBIST, and IP test pattern generation and simulation flows
Analyze results and look for ways to improve test coverage
Collaborate with the global DFT team on design flow improvements
Currently pursuing a Bachelor of Science, Master of Science, or Ph.D. degree in Computer Science, Electrical Engineering, or related fields
Digital logic design skills with Verilog
Knowledge of scan-based logic test, memory BIST/BISR, functional test, JTAG, and other test methodologies is a plus
Demonstrable programming skills with Tcl, Python, Perl, or csh/bash in a Unix environment, with good problem-solving skills
Good understanding of Linux/Unix, with experience working on distributed systems
Effective teamwork and communication skills
The PerksAt Marvell, we offer a total compensation package including a base and bonus.
Additionally, we offer a comprehensive benefits package, including medical, dental and vision coverage or opt-out credit; 401(k) with company match including pre-tax, roth and after-tax contributions; employee stock purchase program (ESPP); wellness & mental health support including coaching and therapy; family support programs including back up care, tutoring, and SNOO rental. Paid time off options include vacation time, holidays, volunteer days, sick time, family care leave, and bonding leave. For more information, please go to www.marvellbenefits.com.
For Internship roles, we are proud to offer the following benefits package during the internship - medical, dental and vision coverage or opt-out credit, perks and discount programs, virtual fitness subsidy, wellness & mental health support including coaching and therapy, paid holidays, paid volunteer days and paid sick time.
Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.
At Marvell, we are doing our part to help keep our communities and our teams safe. As part of our efforts to address the Covid pandemic and future epidemics, you may be required at any time by our policies or applicable laws to provide proof of applicable vaccination or to present negative test results.This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at GR-HR-Services-Americas@marvell.com or 408-222-3604.